The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 23, 2014
Filed:
Jan. 02, 2013
International Business Machines Corporation, Armonk, NY (US);
Deepak I. Hanagandi, Bagalkot, IN;
Krishnendu Mondal, Bangalore, IN;
Michael R. Ouellette, Westford, VT (US);
Michael A. Ziegerhofer, Jeffersonville, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Aspects of the invention provide for decreasing the power supply demand during built-in self test (BIST) initializations. In one embodiment, a BIST architecture for reducing the power supply demand during BIST initializations, includes: a chain of slow BIST I/O interfaces; a chain of fast BIST I/O interfaces, each fast BIST I/O interface connected to a slow BIST I/O interface; and a BIST engine including a burst staggering latch for controlling a multiplexor within each of the slow BIST I/O interfaces, wherein the burst staggering latch, for a first burst signal, staggers the first burst signal to each of the slow BIST I/O interfaces, such that, during a first clock cycle, only a first slow BIST I/O interface receives the first burst signal.