Determining data valid windows in a system and method for testing an integrated circuit device

Abstract

Embodiments of a system and method for testing an integrated circuit device are described herein. Testing is complemented by a determination of characteristics of a data valid window that identifies components of a response data signal from a device under test where the data signal can always be expected to be stable. In at least one embodiment, the method comprises: for each individual data bit region of one or more data bit regions of a second data signal, sampling the second data signal at a plurality of points of the individual data bit region to produce a plurality of sampled values for the second data signal; for each sampled value of the plurality of sampled values, determining whether the sampled value matches an expected bit pattern value corresponding to the sampled value; determining one or more characteristics of the data valid window that defines conditions under which a valid sample can be expected to be taken; and outputting a test outcome based on one or more characteristics of the data valid window. In some embodiments, the second data signal may be sampled at the plurality of points of the individual data bit region concurrently. In some embodiments, the determination of whether each sampled value of the plurality of sampled values matches the expected bit pattern value may be performed concurrently for all of the plurality of sampled values.