The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 23, 2014

Filed:

Mar. 05, 2012
Applicants:

Koji Iwahashi, Fukuoka, JP;

Hidetoshi Ryu, Fukuoka, JP;

Satoshi Sueshima, Fukuoka, JP;

Inventors:

Koji Iwahashi, Fukuoka, JP;

Hidetoshi Ryu, Fukuoka, JP;

Satoshi Sueshima, Fukuoka, JP;

Assignee:

Kabushiki Kaisha Yaskawa Denki, Kitakyushu-Shi, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/12 (2006.01); H02M 7/48 (2006.01);
U.S. Cl.
CPC ...
G06F 1/12 (2013.01); H02M 7/48 (2013.01);
Abstract

An interface circuit includes a general-purpose CPU configured to transmit a clock to a serial encoder with which bidirectional serial communication of clock synchronization type is to be performed, the CPU being configured to transmit and receive data to and from the serial encoder; and an additional circuit configured to detect a start bit of reception data transmitted from the serial encoder. The general-purpose CPU starts counting the number of bits of the reception data in response to a detection signal from the additional circuit, the detection signal indicating the detection of the start bit. The CPU stops transmitting the clock to the serial encoder upon completion of counting a predetermined number of bits of the reception data.


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