The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 23, 2014
Filed:
Aug. 29, 2008
Applicants:
Martin Brox, Munich, DE;
Ronny Schneider, Munich, DE;
Inventors:
Martin Brox, Munich, DE;
Ronny Schneider, Munich, DE;
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/00 (2006.01); G06F 13/28 (2006.01); H03M 7/00 (2006.01); H03M 5/00 (2006.01); H03K 19/003 (2006.01); H03K 19/23 (2006.01); G11C 7/10 (2006.01); G11C 7/06 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4239 (2013.01);
Abstract
An integrated circuit includes an array of memory cells and a digital flag generator circuit configured to generate a data inversion flag based on whether a number of logical zero bits contained in a data word to be transmitted from the memory cells is greater than a threshold number. The digital flag generator circuit includes a first digital stage including a first plurality of binary logic circuits. Each of the binary logic circuits is configured to receive a subset of the data word.