The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 23, 2014

Filed:

Aug. 10, 2013
Applicant:

Hitachi, Ltd., Chiyoda-ku, Tokyo, JP;

Inventors:

Akira Matsumoto, Tokyo, JP;

Naoki Mori, Tokyo, JP;

Takashi Yagi, Tokyo, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 25/06 (2006.01); H04B 1/12 (2006.01);
U.S. Cl.
CPC ...
H04B 1/123 (2013.01);
Abstract

A mechanism is provided for dynamically adjusting DC offset at the time of deviation from DC balance ½ (DC level) in a data pattern including long-period consecutive bits generating DC offset in a section of data. A receiver circuit unit of an LSI having a serializer/deserializer arrangement for performing high-speed serial transmission includes an offset adjusting circuit. The offset adjusting circuit calculates DC balance in an arbitrary section of data by averaging received serial data. Based on comparison between a DC level and the DC balance obtained by averaging the received data, offset is shifted toward the H side when the DC balance exists on the H side from the DC level, and shifted toward the L side when the DC balance exists on the L side.


Find Patent Forward Citations

Loading…