The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 23, 2014

Filed:

Sep. 23, 2011
Applicants:

Shekar Mallikarjunaswamy, San Jose, CA (US);

François Hébert, San Mateo, CA (US);

Inventors:

Shekar Mallikarjunaswamy, San Jose, CA (US);

François Hébert, San Mateo, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/331 (2006.01); H01L 29/735 (2006.01); H01L 21/761 (2006.01); H01L 29/417 (2006.01); H01L 29/08 (2006.01); H01L 29/78 (2006.01); H01L 29/10 (2006.01); H01L 29/66 (2006.01); H01L 29/40 (2006.01); H01L 21/265 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 21/761 (2013.01); H01L 29/735 (2013.01); H01L 29/407 (2013.01); H01L 29/41766 (2013.01); H01L 21/26586 (2013.01); H01L 29/0821 (2013.01); H01L 29/7835 (2013.01); H01L 29/1008 (2013.01); H01L 29/42304 (2013.01); H01L 29/66659 (2013.01); H01L 29/0808 (2013.01); H01L 29/402 (2013.01); H01L 29/6625 (2013.01); H01L 29/41708 (2013.01);
Abstract

A lateral bipolar transistor with deep emitter and deep collector regions is formed using multiple epitaxial layers of the same conductivity type. Deep emitter and deep collector regions are formed without the use of trenches. Vertically aligned diffusion regions are formed in each epitaxial layer so that the diffusion regions merged into a contiguous diffusion region after annealing to function as emitter or collector or isolation structures. In another embodiment, a lateral trench PNP bipolar transistor is formed using trench emitter and trench collector regions. In yet another embodiment, a lateral PNP bipolar transistor with a merged LDMOS transistor is formed to achieve high performance.


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