The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 23, 2014

Filed:

Jul. 28, 2011
Applicants:

Lingjun Zhang, Suzhou, CN;

Feng Zhang, Suzhou, CN;

Jian Wu, Suzhou, CN;

Xusheng Wang, Suzhou, CN;

Inventors:

Lingjun Zhang, Suzhou, CN;

Feng Zhang, Suzhou, CN;

Jian Wu, Suzhou, CN;

Xusheng Wang, Suzhou, CN;

Assignee:

CSI Cells Co., Ltd, Suzhou, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 31/0224 (2006.01); H01L 31/18 (2006.01);
U.S. Cl.
CPC ...
H01L 31/02245 (2013.01); H01L 31/1804 (2013.01); Y02E 10/542 (2013.01); Y02E 10/547 (2013.01);
Abstract

Processes for making light to current converter devices are provided. The processes can be used to make light to current converter devices having P-N junctions located on only the top surface of the cell, located on the top surface and symmetrically or asymmetrically along a portion of the inner surface of the via holes, located on the top surface and full inner surface of the via holes, or located on the top surface, full inner surface of the via holes, and a portion of the bottom surface of the cell. The processes may isolate the desired P-N junction by etching the emitter, forming a via hole after forming the emitter, using a barrier layer to protect portions of the emitter from etching, or using a barrier layer to prevent the emitter from being formed on portions of the substrate.


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