The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2014

Filed:

Oct. 24, 2008
Applicants:

Trishul A. Chilimbi, Seattle, WA (US);

Chen Ding, Rochester, NY (US);

Inventors:

Trishul A. Chilimbi, Seattle, WA (US);

Chen Ding, Rochester, NY (US);

Assignee:

Microsoft Corporation, Redmond, WA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/44 (2006.01); G06F 9/45 (2006.01); G06F 11/34 (2006.01); G06F 12/08 (2006.01);
U.S. Cl.
CPC ...
G06F 11/3447 (2013.01); G06F 8/4441 (2013.01); G06F 2201/885 (2013.01); G06F 12/0842 (2013.01); G06F 11/3404 (2013.01);
Abstract

Described is predicting cache locality in a multicore/multithreaded processing environment including when threads share cache data in a non-uniform interleaving manner. Thread execution traces are analyzed to compute a set of per-thread parameters that can then be used to predict cache miss rates for other cache sizes. In one aspect, a model is based upon a probability that the cache reuse distance will increase because of accesses by other threads, and another probability that the reuse distance will decrease because of intercept accesses by other threads to shared data blocks. Estimates of the number of shared data blocks, possibly shared data blocks and private data blocks are used in the computations.


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