The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2014

Filed:

Dec. 02, 2011
Applicants:

Glen Andrew Harris, Austin, TX (US);

James Nolan Hardage, Austin, TX (US);

Mark Carpenter Glass, Dripping Springs, TX (US);

Inventors:

Glen Andrew Harris, Austin, TX (US);

James Nolan Hardage, Austin, TX (US);

Mark Carpenter Glass, Dripping Springs, TX (US);

Assignee:

ARM Limited, Cambridge, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/34 (2006.01); G06F 9/38 (2006.01); G06F 9/30 (2006.01);
U.S. Cl.
CPC ...
G06F 9/384 (2013.01); G06F 9/3012 (2013.01); G06F 9/34 (2013.01); G06F 9/3824 (2013.01);
Abstract

A processor core supports execution of program instruction from both a first instruction set and a second instruction set. An architectural register filecontaining architectural registers is shared by the two instruction sets. The two instruction sets employ logical register specifiers which for at least some values of those logical registers specifiers correspond to different architectural registers within the architectural register file. A first decoderfor the first instruction set and a second decoderfor the second instruction set serve to decode the logical register specifiers to a common register addressing format. This common register addressing format is used to supply register specifiers to renaming circuitryfor supporting register renaming in conjunction with a physical register fileand an architectural register file


Find Patent Forward Citations

Quick Actions:

Harris, Glen. (2014). Mapping same logical register specifier for different instruction sets with divergent association to architectural register file using common address format (U.S. Patent No. 8914615). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8914615

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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