The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2014

Filed:

Nov. 09, 2012
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

David A. Donovan, Oakland, CA (US);

Justin Gregg, San Francisco, CA (US);

Vishuanath Venkataraman, San Francisco, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/24 (2006.01); H03F 1/02 (2006.01); H03F 3/189 (2006.01);
U.S. Cl.
CPC ...
H03F 3/24 (2013.01); H03F 1/0216 (2013.01); H03F 3/189 (2013.01); H03F 2200/27 (2013.01); H03F 2200/451 (2013.01); H03F 2200/504 (2013.01);
Abstract

Electronic devices with wireless communications capabilities are provided. The electronic device may include storage and processing circuitry, power amplifier circuitry, power supply circuitry, etc. The storage and processing circuitry may direct the power amplifier circuitry to operate using a desired gain mode, in a particular radio channel, and at a given output power level. The power supply circuitry may bias the power amplifier circuitry with a power supply voltage. The performance of the power amplifier circuitry may be characterized by an adjacent channel leakage ratio (ACLR) margin. The power consumption of the power amplifier circuitry may be characterized by a current savings ratio. A cost function may be calculated by taking the product of the ACLR margin and current savings ratio. A minimum point for each cost function curve may be determined. It is desirable to bias the power amplifier circuitry with a supply voltage corresponding to the minimum point.


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