The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2014

Filed:

Jul. 05, 2012
Applicants:

Kerry Veenstra, San Jose, CA (US);

Krishna Rangasayee, Mountain View, CA (US);

Robert Bielby, Pleasanton, CA (US);

Inventors:

Kerry Veenstra, San Jose, CA (US);

Krishna Rangasayee, Mountain View, CA (US);

Robert Bielby, Pleasanton, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01); H03L 7/187 (2006.01);
U.S. Cl.
CPC ...
H03L 7/187 (2013.01);
Abstract

A signal routing apparatus comprises a register bank to store a set of data signals. A delay locked loop generates a set of phase displaced clock signals. A phase controlled read circuit sequentially routes the set of data signals from the register bank in response to the phase displaced clock signals. A Low Voltage Differential Signaling buffer connected to the phase controlled read circuit transmits the data signals in a Low Voltage Differential Signaling mode. The phase displaced clock signals operate in lieu of a higher clock rate in order to reduce power consumption.


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