The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 16, 2014
Filed:
Jul. 27, 2012
Vishal P. Trivedi, Chandler, AZ (US);
Vishal P. Trivedi, Chandler, AZ (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A hybrid transistor () has a substrate () with a first (e.g., P type) well region () and a second (e.g., N type) well region () with an NP or PN junction () therebetween. A MOS portion (-) of the hybrid transistor () has an (e.g., N type) source region () in the first well region () and a gate conductor () overlying and insulated from the well regions () that extends laterally at least to the junction (). A drain or anode (D/A) portion (-) in the second well region () collects currentfrom the source region (), and includes a bipolar transistor () having an (e.g., N+) emitter region (), a (e.g., P type) base region () and a (e.g., N type) collector region () laterally separated from the junction (). Different LDMOS-like or IGBT-like properties are obtained depending on whether the currentis extracted from the hybrid transistor () via the bipolar transistor () base () or emitter () or both. The bipolar transistor () is desirably a vertical hetero-junction transistor.