The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2014

Filed:

Jul. 13, 2009
Applicants:

Vishakha Gupta, Atlanta, GA (US);

Niraj Tolia, Mountain View, CA (US);

Vanish Talwar, Palo Alto, CA (US);

Partha Ranganathan, Fremont, CA (US);

Inventors:

Vishakha Gupta, Atlanta, GA (US);

Niraj Tolia, Mountain View, CA (US);

Vanish Talwar, Palo Alto, CA (US);

Partha Ranganathan, Fremont, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/46 (2006.01); G06F 9/455 (2006.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 9/5077 (2013.01); G06F 9/455 (2013.01);
Abstract

A system and method is shown that includes an admission control module that resides in a management/driver domain, the admission control module to admit a domain that is part of a plurality of domains, into the computer system based upon one of a plurality of accelerators satisfying a resource request of the domain. The system and method also includes a load balancer module, which resides in the management/driver domain, the load balancer to balance at least one load from the plurality of domains across the plurality of accelerators. Further, the system and method also includes a scheduler module that resides in the management/driver domain, the scheduler to multiplex multiple requests from the plurality of domains to one of the plurality of accelerators.


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