The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2014

Filed:

Dec. 28, 2009
Applicants:

Fabio Campi, Zola Predosa, IT;

Claudio Mucci, Bologna, IT;

Stefano Pucillo, Robbiate, IT;

Luca Ciccarelli, Rimini, IT;

Valentina Nardone, Monza, IT;

Inventors:

Fabio Campi, Zola Predosa, IT;

Claudio Mucci, Bologna, IT;

Stefano Pucillo, Robbiate, IT;

Luca Ciccarelli, Rimini, IT;

Valentina Nardone, Monza, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza (MB), IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 15/76 (2006.01); G06F 9/30 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5068 (2013.01); G06F 2217/64 (2013.01);
Abstract

A method is for designing an accelerator for digital signal processing including defining a software programmable fully pre-laid out macro by pre-laying out with a fixed topology a control logic of the DSP accelerator to obtain a fully pre-laid out control logic. The method further includes defining a hardware programmable partially pre-laid out macro by customizing a configurable layout area, thereby mapping a computational logic based on computation kernels related to an application of the DSP accelerator. A partially pre-laid out computational logic is therefore obtained.


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