The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 09, 2014
Filed:
Feb. 12, 2013
Qualcomm Incorporated, San Diego, CA (US);
Gregory Ameriada Uvieghara, Murrieta, CA (US);
Michael Batenburg, San Diego, CA (US);
Esin Terzioglu, San Diego, CA (US);
Yucong Tao, San Diego, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
Systems and methods for detecting power attacks related to subnormal read voltage on an integrated circuit. Upon initiating power up of the integrated circuit and prior to reading configuration information from non-volatile memory (NVM), test cells associated with the NVM are read first. The test cells share a common power supply with the NVM and output read values from the test cells are configured to deviate from values pre-programmed in the test cells when a subnormal read voltage is applied on the common power supply. Thus, by comparing the output read values with the pre-programmed values, it can be determined whether voltage of the common power supply is subnormal, wherein configuration information will be read incorrectly at a subnormal read voltage. If the voltage is subnormal, power up is aborted. Otherwise, power up is allowed to proceed by reading the configuration information from the NVM.