The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 09, 2014
Filed:
Jun. 29, 2009
Lin LU, San Diego, CA (US);
Andrew Stephen Poynot, San Diego, CA (US);
Lin Lu, San Diego, CA (US);
Andrew Stephen Poynot, San Diego, CA (US);
KYOCERA Corporation, Kyoto, JP;
Abstract
An apparatus, system, and method provide electrostatic discharge (ESD) protection in electronic devices. The ESD channels are positioned within the electrical insulation sheet to provide electrical paths to ground having a lower impedance than electrical paths to protected areas covered by the electrical insulation sheet. An ESD follows the path of least resistance safely to ground rather than to a critical component within the electronic device. The ESD channels are openings in a dome contact layer of a keypad where the openings are positioned over one or more ground areas of a printed circuit board (PCB) and the insulating material of the dome contact layer covers areas of the PCB that are protected from ESD. By implementing dedicated GPIO lines, grounded metal domes cover the signal pads in the target discharge area to protected the GPIO lines from ESD. Device components are protected from ESD without additional ports or insulation.