The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 09, 2014
Filed:
Sep. 24, 2012
Applicant:
Analog Devices, Inc., Norwood, MA (US);
Inventors:
Moshe Gerstenhaber, Newton, MA (US);
Rayal Johnson, Cambridge, MA (US);
Assignee:
Analog Devices, Inc., Norwood, MA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01);
U.S. Cl.
CPC ...
H03F 3/45 (2013.01);
Abstract
Apparatus and methods for reducing load-induced non-linearity in amplifiers are provided. In certain implementations, an amplifier includes a current mirror, a buffer circuit, and an output stage. The buffer circuit can have a relatively high current gain and a voltage gain about equal to 1. The buffer circuit can amplify a mirrored current generated by the current mirror and provide the amplified mirrored current to the output stage, thereby helping to balance or equalize currents in the current mirror and avoiding the impact of load-induced offset error.