The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 09, 2014
Filed:
Nov. 30, 2012
Samsung Electronics Co., Ltd., Suwon-Si, Gyeonggi-Do, KR;
Rahul Singh, Yongin-si, KR;
Hyoung Wook Lee, Seoul, KR;
Samsung Electronics Co., Ltd., Gyeonggi-Do, KR;
Abstract
A clock-delayed domino logic circuit includes a first pre-charge circuit configured to pre-charge a first dynamic node with a pre-charge voltage in response to a first clock signal received via a first control terminal during a pre-charge operation; a first logic network configured to determine a logic level of the first dynamic node in response to first input data signals during an evaluation operation; and a first storage circuit which is connected between the first control terminal and the first dynamic node.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile