The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2014

Filed:

Feb. 28, 2013
Applicants:

Sung-shan Tai, San Jose, CA (US);

Sik Lui, Sunnyvale, CA (US);

Xiaobin Wang, San Jose, CA (US);

Inventors:

Sung-Shan Tai, San Jose, CA (US);

Sik Lui, Sunnyvale, CA (US);

Xiaobin Wang, San Jose, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/40 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/45 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7813 (2013.01); H01L 29/407 (2013.01); H01L 29/66727 (2013.01); H01L 29/66734 (2013.01); H01L 29/7811 (2013.01); H01L 29/0638 (2013.01); H01L 29/0653 (2013.01); H01L 29/0878 (2013.01); H01L 29/41766 (2013.01); H01L 29/4236 (2013.01); H01L 29/456 (2013.01);
Abstract

A semiconductor device and fabrication methods are disclosed. The device includes a plurality of gate electrodes formed in trenches located in an active region of a semiconductor substrate. A first gate runner is formed in the substrate and electrically connected to the gate electrodes, wherein the first gate runner surrounds the active region. A second gate runner is connected to the first gate runner and located between the active region and a termination region. A termination structure surrounds the first and second gate runners and the active region. The termination structure includes a conductive material in an insulator-lined trench in the substrate, wherein the termination structure is electrically shorted to a source or body layer of the substrate thereby forming a channel stop for the device.


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