The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2014

Filed:

Jan. 27, 2014
Applicant:

Siano Mobile Silicon Ltd., Kfar Netter, IL;

Inventor:

Neil David Feldman, Misgav, IL;

Assignee:

Siano Mobile Silicon Ltd., Kfar Netter, IL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01); H04B 1/10 (2006.01); H01L 23/522 (2006.01); H01L 23/552 (2006.01); H01L 23/66 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01); H04B 1/08 (2006.01); H01L 25/18 (2006.01);
U.S. Cl.
CPC ...
H04B 1/10 (2013.01); H01L 23/5225 (2013.01); H01L 23/552 (2013.01); H01L 23/66 (2013.01); H01L 25/0657 (2013.01); H01L 24/82 (2013.01); H04B 1/08 (2013.01); H01L 25/18 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73265 (2013.01); H01L 2225/0651 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/3025 (2013.01);
Abstract

An apparatus includes a device package, a first Integrated Circuit (IC) that is packaged in the device package, and a second IC, which is packaged in the device package and is fabricated on a multi-layer interconnection circuit including a plurality of interconnection layers for interconnecting components of the second IC, wherein a selected layer in the plurality is configured to serve as a conductive shield for reducing interference between the first and second ICs.


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