The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2014

Filed:

May. 21, 2013
Applicants:

Fujitsu Limited, Kawasaki, JP;

The University of Tokyo, Tokyo, JP;

Inventors:

Nobuaki Hatori, Kanagawa, JP;

Tsuyoshi Yamamoto, Kawasaki, JP;

Manabu Matsuda, Kawasaki, JP;

Yasuhiko Arakawa, Kanagawa, JP;

Assignees:

Fujitsu Limited, Kawasaki, JP;

The University of Tokyo, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01S 5/12 (2006.01); B82Y 20/00 (2011.01); H01S 5/22 (2006.01); H01S 5/34 (2006.01); H01L 33/02 (2010.01); B82Y 40/00 (2011.01); H01L 33/30 (2010.01); H01S 5/343 (2006.01); H01S 5/042 (2006.01); H01S 5/30 (2006.01);
U.S. Cl.
CPC ...
H01S 5/341 (2013.01); H01S 5/221 (2013.01); H01S 5/3412 (2013.01); H01S 5/3403 (2013.01); H01S 5/22 (2013.01); H01L 33/02 (2013.01); B82Y 40/00 (2013.01); H01L 33/30 (2013.01); Y10S 977/774 (2013.01); H01S 5/12 (2013.01); H01S 5/34313 (2013.01); H01S 5/0424 (2013.01); B82Y 20/00 (2013.01); H01S 5/309 (2013.01);
Abstract

A method for manufacturing a semiconductor light emitting device includes forming a lower cladding layer over a GaAs substrate; forming a quantum dot active layer over the lower cladding layer; forming a first semiconductor layer over the quantum dot active layer; forming a diffraction grating by etching the first semiconductor layer; forming a second semiconductor layer burying the diffraction grating; and forming an upper cladding layer having a conductive type different from that of the lower cladding layer over the second semiconductor layer, wherein the processes after forming the quantum dot active layer are performed at a temperature not thermally deteriorating or degrading quantum dots included in the quantum dot active layer.


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