The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 02, 2014

Filed:

Mar. 14, 2013
Applicant:

The Mathworks, Inc., Natick, MA (US);

Inventors:

Partha Biswas, Wayland, MA (US);

Vijaya Raghavan, Brookline, MA (US);

Zhihong Zhao, Newton, MA (US);

Assignee:

The MathWorks, Inc., Natick, MA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/45 (2006.01);
U.S. Cl.
CPC ...
G06F 9/4457 (2013.01);
Abstract

A system and method automatically inserts pipelines into a high-level program specification. An Intermediate Representation (IR) builder creates one or more graphs or trees based on the high-level program specification. A scheduler iteratively applies a bounded scheduling algorithm to produce an execution schedule for the IR minimizing overall execution time for a given number of pipeline stages. A Hardware Description Language (HDL) code generator may utilize the pipelined, scheduled IR to generate optimized HDL code corresponding to the high-level program specification. An annotated version of the high-level program specification showing where the pipelines have been inserted may be displayed allowing additional design exploration.


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