The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 02, 2014

Filed:

Nov. 26, 2012
Applicant:

Panasonic Corporation, Osaka, JP;

Inventors:

Akifumi Kawahara, Kyoto, JP;

Ryotaro Azuma, Osaka, JP;

Kazuhiko Shimakawa, Osaka, JP;

Kouhei Tanabe, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0069 (2013.01); G11C 13/00 (2013.01); G11C 13/0002 (2013.01);
Abstract

Provided is a variable resistance nonvolatile memory device that achieves, in multi-bit simultaneous writing for increasing a writing speed, writing with little variation caused by positions of memory cells in multi-bit simultaneous writing. The variable resistance nonvolatile memory device includes bit lines, word lines, memory cells, a first write circuit (e.g., a write circuit (-)), a second write circuit (e.g., a write circuit (-k−1)), a first selection circuit (e.g., a selection circuit (S)), a second selection circuit (e.g., a selection circuit (S_k−1)), and a first word line drive circuit (a word line drive circuit (-)), wherein the first selection circuit (e.g., an NMOS transistor (TSto TS_m−1) included in the selection circuit) has a greater ON resistance than the second selection circuit (e.g., an NMOS transistor (TS_k−1to TS_k−1_m−1) included in the selection circuit) does.


Find Patent Forward Citations

Loading…