The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 02, 2014

Filed:

Mar. 09, 2012
Applicants:

Chris J. Rebeor, Cambridge, VT (US);

Rohit Shetty, Essex Junction, VT (US);

Inventors:

Chris J. Rebeor, Cambridge, VT (US);

Rohit Shetty, Essex Junction, VT (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/177 (2006.01);
U.S. Cl.
CPC ...
Abstract

A hybrid IO cell for use with controlled collapse chip connection, wirebond core limited, wirebond IO limited, and wirebond inline chip designs is provided. A method of designing the hybrid IO cell includes designating a technology, determining a minimum pad width of the technology, and determining a minimum pad spacing of the technology. The method also includes determining a width of the hybrid IO cell based on the minimum pad width and the minimum pad spacing, setting a length of the hybrid IO cell equal to the determined width, and storing a definition of the IO cell in a library stored on a computer useable storage medium.


Find Patent Forward Citations

Rebeor, Chris. (2014). Hybrid io cell for wirebond and c4 applications (U.S. Patent No. 8901959). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8901959

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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