The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 02, 2014

Filed:

Dec. 27, 2010
Applicants:

Sukhun Choi, Suwon-si, KR;

Boun Yoon, Seoul, KR;

Injoon Yeo, Hwaseong-si, KR;

Jeongnam Han, Seoul, KR;

Inventors:

Sukhun Choi, Suwon-si, KR;

Boun Yoon, Seoul, KR;

Injoon Yeo, Hwaseong-si, KR;

Jeongnam Han, Seoul, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/06 (2006.01); H01L 21/82 (2006.01); H01L 21/28 (2006.01); H01L 49/02 (2006.01); H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
H01L 21/28008 (2013.01); H01L 21/823814 (2013.01); H01L 27/0629 (2013.01); H01L 28/20 (2013.01); H01L 21/823807 (2013.01);
Abstract

A semiconductor device includes a substrate, a device isolation pattern and a passive circuit element. The device isolation pattern is located on the substrate, delimits an active region of the substrate, and includes a recessed portion having a bottom surface located below a plane coincident with a surface of the active region. The passive circuit element is situated in the recess so as to be disposed on the bottom surface of the recessed portion of the device isolation pattern.


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