The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 02, 2014
Filed:
Mar. 21, 2011
Daisuke Yamashita, Hyogo-ken, JP;
Etsuo Hamada, Hyogo-ken, JP;
Hideki Nozaki, Hyogo-ken, JP;
Hironobu Shibata, Hyogo-ken, JP;
Daisuke Yamashita, Hyogo-ken, JP;
Etsuo Hamada, Hyogo-ken, JP;
Hideki Nozaki, Hyogo-ken, JP;
Hironobu Shibata, Hyogo-ken, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The method can include forming a base region and an emitter region in a front surface of a semiconductor layer. The method can include forming a first impurity implantation region by implanting first impurity of a first conductivity type into a back surface of the semiconductor layer. The method can include selectively forming a second impurity implantation region by selectively implanting second impurity of a second conductivity type into the first impurity implantation region. In addition, the method can include irradiating the first impurity implantation region and the second impurity implantation region with laser light. A peak of impurity concentration profile in a depth direction of at least one of the first impurity implantation region and the second impurity implantation region before irradiation with the laser light is adjusted to a depth of 0.05 μm or more and 0.3 μm or less from the back surface of the semiconductor layer.