The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 25, 2014

Filed:

Apr. 19, 2010
Applicants:

Puneet Sharma, Austin, TX (US);

Magdy S. Abadir, Austin, TX (US);

Scott P. Warrick, Austin, TX (US);

Inventors:

Puneet Sharma, Austin, TX (US);

Magdy S. Abadir, Austin, TX (US);

Scott P. Warrick, Austin, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 9/455 (2006.01); G06F 11/22 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5072 (2013.01); G06F 2217/78 (2013.01); G06F 2217/12 (2013.01);
Abstract

A method includes preferentially placing fill regions adjacent to transistors of a particular conductivity type, such as p-channel transistors, for a plurality of standard cell instances of a device design. The method also includes evaluating all transistors of the first conductivity type prior to evaluating any transistors of a second conductivity type. The second conductivity type is opposite the first conductivity type. For each transistor being evaluated, it is determined whether a criterion is me. A fill region is placed within a field isolation region adjacent to the transistor if the criterion is met.


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