The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8898601 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 25, 2014

Filed:

Jul. 22, 2013
Applicant:

Kabushiki Kaisha Toshiba, Tokyo, JP;

Inventors:

Masahisa Miyake, Tokyo, JP;

Kenji Yoshida, Kanagawa-ken, JP;

Kazumasa Nomura, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/505 (2013.01);
Abstract

According to one embodiment, a logic circuit design method of an embodiment includes generating logical data corresponding to register transfer level description, based on design data containing the register transfer level description, and generating constraint conditions designating circuit data which satisfies a predetermined condition among plural gate level circuit data logically equivalent to the logical data, based on the design data, and generating gate level circuit data based on the logical data under the constraint conditions.


Find Patent Forward Citations

Miyake, Masahisa. (2014). Logic circuit design method, logic circuit design program, and logic circuit design system (U.S. Patent No. 8898601). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8898601

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