The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 25, 2014

Filed:

Jun. 24, 2010
Applicants:

Luis A. Lastras-montano, Cortlandt Manor, NY (US);

Patrick J. Meaney, Poughkeepsie, NY (US);

Vesselina K. Papazova, Highland, NY (US);

Eldee Stephens, Westbury, CT (US);

Lisa C. Gower, LaGrangeville, NY (US);

Inventors:

Kevin C. Gower, LaGrangeville, NY (US);

Luis A. Lastras-Montano, Cortlandt Manor, NY (US);

Patrick J. Meaney, Poughkeepsie, NY (US);

Vesselina K. Papazova, Highland, NY (US);

Eldee Stephens, Westbury, CT (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/14 (2006.01); G06F 11/10 (2006.01); G06F 11/16 (2006.01); G06F 11/20 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1666 (2013.01); G06F 2211/1088 (2013.01); G06F 11/108 (2013.01); G06F 11/141 (2013.01); G06F 11/1604 (2013.01); G06F 11/1044 (2013.01); G06F 11/20 (2013.01); G06F 11/2007 (2013.01);
Abstract

Providing homogeneous recovery in a redundant memory system that includes a memory controller, a plurality of memory channels in communication with the memory controller, an error detection code mechanism configured for detecting a failing memory channel, and an error recovery mechanism. The error recovery mechanism is configured for receiving notification of the failing memory channel, for blocking off new operations from starting on the memory channels, for completing any pending operations on the memory channels, for performing a recovery operation on the memory channels and for starting the new operations on at least a first subset of the memory channels. The memory system is capable of operating with the first subset of the memory channels.


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