The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 25, 2014

Filed:

Nov. 19, 2008
Applicants:

Harikrishna Madadi Reddy, San Jose, CA (US);

Himadri Choudhury, Santa Clara, CA (US);

Manindra Parhy, Fremont, CA (US);

Liang Cheng, San Jose, CA (US);

Inventors:

Harikrishna Madadi Reddy, San Jose, CA (US);

Himadri Choudhury, Santa Clara, CA (US);

Manindra Parhy, Fremont, CA (US);

Liang Cheng, San Jose, CA (US);

Assignee:

Nvidia Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 29/06 (2006.01); G06F 21/00 (2013.01); G06K 9/36 (2006.01); H04N 7/26 (2006.01); H04N 7/12 (2006.01); H04N 19/61 (2014.01); H04N 19/42 (2014.01); H04N 19/115 (2014.01); H04N 19/137 (2014.01); H04N 19/149 (2014.01); H04N 19/176 (2014.01); H04N 19/124 (2014.01); H04N 19/164 (2014.01); H04B 1/66 (2006.01); H04N 7/30 (2006.01);
U.S. Cl.
CPC ...
H04N 19/0009 (2013.01); H04N 19/00781 (2013.01); H04N 19/00478 (2013.01); H04N 19/0006 (2013.01); H04N 19/00145 (2013.01); H04N 19/00181 (2013.01); H04N 19/00278 (2013.01); H04N 19/00236 (2013.01);
Abstract

A system for executing video encoding operations. The system includes a video encoder for encoding an incoming video stream into a plurality of macro blocks. A motion estimation engine is coupled to the video encoder for controlling the encoding of the macro blocks. A video rate control processor is coupled to the video encoder and coupled to the motion estimation engine. The video rate control processor receives a plurality of parameters from the video encoder that indicate an encoding complexity for a macro block and a video frame of the video stream and, upon receiving an indication from the motion estimation engine, computes a quantization parameter for the macro block. The quantization parameter is dynamically adjusted for the video stream to achieve a target bit rate.


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