Vertical thin-film transistor structure of display panel and method of fabricating the same

Abstract

A vertical thin-film transistor structure includes a substrate, a source electrode, an insulation layer, a drain electrode, two first channel layers, a gate insulation layer and a gate electrode, which are stacked upward in that order on the substrate. The first channel layers are respectively disposed at two opposite ends of the drain electrode, and extend from the upper surface of the drain electrode to the upper surface of the source electrode respectively. Each of the first channel layers contacts the source electrode and the drain electrode. The gate insulation layer is disposed on the source electrode, the first channel layers and the drain electrode. The gate electrode is disposed on the gate insulation layer and covers the first channel layers. Therefore, the volume of the conventional thin-film transistor structure shrinks, and the ratio of the volume of the conventional thin-film transistor structure to that of a pixel structure decreases.