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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8895388 B1

PDFFull Text
Date of Patent:
Nov. 25, 2014

Filed:

Jul. 13, 2007

Method of manufacturing a semiconductor device and a non-volatile semiconductor storage device including the formation of an insulating layer using a plasma treatment

Applicants:

Tetsuya Kakehata, Isehara, JP;

Tomokazu Yokoi, Atsugi, JP;

Inventors:

Tetsuya Kakehata, Isehara, JP;

Tomokazu Yokoi, Atsugi, JP;

Assignee:

Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken, JP;

Attorneys:

Eric J. Robinson

Robinson Intellectual Property Law Office, P.C.

Primary Examiner:

Mark A Laurenzi

Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/28 (2006.01); H01L 21/02 (2006.01); H01L 21/316 (2006.01); H01L 27/115 (2006.01); H01L 27/105 (2006.01); H01L 27/12 (2006.01); H01L 29/78 (2006.01); H01L 21/84 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02238 (2013.01); H01L 27/1203 (2013.01); H01L 21/28273 (2013.01); H01L 27/12 (2013.01); H01L 29/785 (2013.01); H01L 21/31662 (2013.01); H01L 27/11526 (2013.01); H01L 27/105 (2013.01); H01L 27/11546 (2013.01); H01L 21/02252 (2013.01); H01L 21/84 (2013.01); H01L 27/1214 (2013.01);
Abstract

An object is to provide a technique for manufacturing an insulating layer with favorable withstand voltage. Another object is to provide a technique for manufacturing a semiconductor device having an insulating layer with favorable withstand voltage. By subjecting a semiconductor layer or semiconductor substrate mainly containing silicon to a high density plasma treatment, an insulating layer is formed on a surface of the semiconductor layer or a top surface of the semiconductor substrate. At this time, the high density plasma treatment is performed by switching a supply gas in the middle of the treatment from a gas containing a rare gas, oxygen, and hydrogen, to a gas containing a rare gas and oxygen.

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