The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2014

Filed:

Jan. 24, 2013
Applicants:

Samaksh Sinha, Singapore, SG;

Garima Sharda, Ghaziabad, IN;

Nishant Singh Thakur, Indore, IN;

Inventors:

Samaksh Sinha, Singapore, SG;

Garima Sharda, Ghaziabad, IN;

Nishant Singh Thakur, Indore, IN;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 1/00 (2006.01); H02J 1/10 (2006.01); G05F 1/10 (2006.01);
U.S. Cl.
CPC ...
G05F 1/10 (2013.01);
Abstract

A power supply that provides a supply voltage to an integrated circuit (IC) includes high and low power regulators and a power management circuit. The high power regulator regulates the supply voltage at a first voltage level and the low power regulator is set to an inactive mode when the IC is in a RUN mode. When the IC transitions from the RUN mode to a STOP mode, the high power regulator stops regulating and the supply voltage is maintained at a second voltage level, while the lower power regulator is set to an active mode for regulating the supply voltage at a third voltage level. A fallback signal is generated when the supply voltage drops below a first threshold value after which the low power regulator is set in the inactive mode and the high power regulator is configured to regulate the supply voltage at a fourth voltage level.


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