The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2014

Filed:

Aug. 29, 2013
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Woon-Seob Lee, Suwon-si, KR;

Sin-Woo Kang, Suwon-si, KR;

Ki-Young Yun, Suwon-si, KR;

Sung-Dong Cho, Hwaseong-si, KR;

Eun-Ji Kim, Seoul, KR;

Yeong-Lyeol Park, Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/70 (2006.01); H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
H01L 23/481 (2013.01);
Abstract

An integrated circuit device includes a substrate having a plurality of device patterns thereon. A device isolation layer is provided on the substrate, an interlayer dielectric layer is provided on the device isolation layer and the substrate, and a conductive via extends through the interlayer dielectric layer and the device isolation layer and into the substrate. A conductive via contact pad is provided on the interlayer dielectric layer in electrical contact with the conductive via. In plan view, the conductive via contact pad is confined within an area of the interlayer dielectric layer and/or an area of the device isolation layer that electrically insulates the conductive via contact pad from the substrate. Related methods and devices are also discussed.


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