The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 18, 2014
Filed:
Dec. 22, 2011
Applicants:
Panda Durga, Boise, ID (US);
Jaydip Guha, Boise, ID (US);
Robert Kerr, Boise, ID (US);
Inventors:
Assignee:
Nan Ya Technology Corporation, Tao-yuan Hsien, TW;
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/0328 (2006.01); H01L 21/8242 (2006.01); H01L 27/105 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 27/105 (2013.01); H01L 29/6656 (2013.01);
Abstract
The present invention relates to a method of manufacturing sidewall spacers on a memory device. The method comprises forming sidewall spacers on a memory device having a memory array region and at least one peripheral circuit region by forming a first sidewall spacer adjacent to a word line in the memory array region and a second sidewall spacer adjacent to a transistor in the peripheral circuit region. The first sidewall spacer has a first thickness and the second sidewall spacer has a second thickness, wherein the second thickness is greater than the first thickness.