The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 18, 2014
Filed:
Feb. 26, 2010
Dong-hyun Lee, Yongin, KR;
Ki-yong Lee, Yongin, KR;
Jin-wook Seo, Yongin, KR;
Tae-hoon Yang, Yongin, KR;
Maxim Lisachenko, Yongin, KR;
Byoung-keon Park, Yongin, KR;
Kil-won Lee, Yongin, KR;
Jae-wan Jung, Yongin, KR;
Dong-Hyun Lee, Yongin, KR;
Ki-Yong Lee, Yongin, KR;
Jin-Wook Seo, Yongin, KR;
Tae-Hoon Yang, Yongin, KR;
Maxim Lisachenko, Yongin, KR;
Byoung-Keon Park, Yongin, KR;
Kil-Won Lee, Yongin, KR;
Jae-Wan Jung, Yongin, KR;
Samsung Display Co., Ltd., Yongin, KR;
Abstract
A method of forming a polycrystalline silicon layer, a thin film transistor (TFT), an organic light emitting diode (OLED) display device having the same, and methods of fabricating the same. The method of forming a polycrystalline silicon layer includes providing a substrate, forming a buffer layer on the substrate, forming an amorphous silicon layer on the buffer layer, forming a groove in the amorphous silicon layer, forming a capping layer on the amorphous silicon layer, forming a metal catalyst layer on the capping layer, and annealing the substrate and crystallizing the amorphous silicon layer into a polycrystalline silicon layer.