The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2014

Filed:

Jan. 27, 2006
Applicants:

Fatemeh Shahedipour-sandvik, Clifton Park, NY (US);

Di Wu, Bothell, WA (US);

Jamil Kahn Muhammad, Albany, NY (US);

Inventors:

Fatemeh Shahedipour-Sandvik, Clifton Park, NY (US);

Di Wu, Bothell, WA (US);

Jamil Kahn Muhammad, Albany, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/20 (2006.01); H01L 21/36 (2006.01); H01L 21/02 (2006.01); C30B 25/18 (2006.01); C30B 29/40 (2006.01); C30B 25/02 (2006.01); H01L 33/00 (2010.01);
U.S. Cl.
CPC ...
C30B 25/02 (2013.01); H01L 21/0254 (2013.01); H01L 21/02458 (2013.01); H01L 21/02658 (2013.01); C30B 25/183 (2013.01); C30B 29/403 (2013.01); H01L 33/007 (2013.01); H01L 21/02513 (2013.01); H01L 21/0237 (2013.01); H01L 21/02381 (2013.01);
Abstract

A highly dislocation free compound semiconductor, e.g. AlInGaN (0≦x, y≦1), is formed on a lattice mismatched substrate, e.g. Si, by first depositing a polycrystalline buffer layer on the substrate. A defective layer is then created at or near the interface of the substrate and the polycrystalline buffer layer, e.g. through ion implantation. A monocrystalline template layer of the compound semiconductor is then created on the buffer layer, and an epilayer of the compound semiconductor is grown on the template layer. A compound semiconductor based device structure may be formed in the epilayer.


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