The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 11, 2014
Filed:
Dec. 27, 2013
Chetan Verma, Noida, IN;
Amit Kumar Dey, Noida, IN;
Amit Roy, Noida, IN;
Vijay Tayal, Noida, IN;
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
An on-chip timing slack monitor that measures timing slack at the end of a critical path includes a master-slave flip-flop having a tap on the Q output of the master and a logic module coupled to the flip-flop for producing a pulse whose width is a function of the slack. A pulse width shrinking delay line removes glitches on the flip-flop output and, in combination with a digital integrator and counter, also performs a time to digital conversion operation for determining a value for timing path slack. The determined value is used by a decision module for yield analysis. The monitor can discriminate a glitch from a slack pulse at the flip-flop output for any width of glitch up to one-half of a clock cycle.