The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 11, 2014

Filed:

Aug. 02, 2011
Applicants:

Ryo Kuya, Yokohama, JP;

Yasuki Nakamura, Yokohama, JP;

Hiroshi Terashima, Yokohama, JP;

Tatsuya Yoshino, Yokohama, JP;

Masaharu Kimura, Yokohama, JP;

Inventors:

Ryo Kuya, Yokohama, JP;

Yasuki Nakamura, Yokohama, JP;

Hiroshi Terashima, Yokohama, JP;

Tatsuya Yoshino, Yokohama, JP;

Masaharu Kimura, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/44 (2006.01); G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5022 (2013.01); G06F 2217/86 (2013.01);
Abstract

A simulation apparatus is disclosed, including a hardware simulator and a CPU model. The hardware simulator activates one or more logical hardware models for verifying embedded software. The CPU model is one of the one or more logical hardware models which imitates a CPU which executes the embedded software, and to trigger the embedded software to operate without synchronization for each of instructions.


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