The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 11, 2014

Filed:

Jul. 13, 2010
Applicants:

Arifur Rahman, San Jose, CA (US);

Michael J. Hart, Palo Alto, CA (US);

Venkatesan Murali, San Jose, CA (US);

Inventors:

Arifur Rahman, San Jose, CA (US);

Michael J. Hart, Palo Alto, CA (US);

Venkatesan Murali, San Jose, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 19/00 (2011.01);
U.S. Cl.
CPC ...
Abstract

A method of reducing variation in multi-die integrated circuits can include, for each of a plurality of dies, determining at least one performance metric and selecting at least two dies for inclusion within a multi-die integrated circuit according to the at least one performance metric. Systems and devices for executing the steps of the method are also described.


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