The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 11, 2014

Filed:

Sep. 05, 2012
Applicant:

Lingkuan Meng, Beijing, CN;

Inventor:

Lingkuan Meng, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66545 (2013.01);
Abstract

A method of manufacturing a semiconductor device is disclosed. The method may comprise: forming a gate stack on a substrate; depositing a dielectric layer on the substrate and the gate stack; performing a main etching operation on the dielectric layer to form a spacer, with a remainder of the dielectric layer left on the substrate; and performing an over etching operation to remove the remainder of the dielectric layer. According to the method disclosed herein, two etching operations where an etching gas comprises a helium gas are performed, without forming an etching stop layer of silicon oxide. As a result, it is possible to reduce damages to the substrate and also to reduce the process complexity. Further, it is possible to optimize a threshold voltage, effectively reduce an EOT, and enhance a gate control capability and a driving current.


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