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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8883576 B1

PDFFull Text
Date of Patent:
Nov. 11, 2014

Filed:

Sep. 13, 2012

Methods of fabricating semiconductor devices using mask shrinking

Applicants:

Jinkwan Lee, Seoul, KR;

Yoochul Kong, Seoul, KR;

Seongsoo Lee, Seongnam-si, KR;

Inventors:

Jinkwan Lee, Seoul, KR;

Yoochul Kong, Seoul, KR;

Seongsoo Lee, Seongnam-si, KR;

Assignee:

Samsung Electronics Co., Ltd., , KR;

Attorney:

Myers Bigel Sibley & Sajovec, P.A.

Primary Examiner:

Hsien Ming Lee

Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/338 (2006.01); H01L 29/74 (2006.01); H01L 29/80 (2006.01); H01L 27/115 (2006.01); H01L 21/3213 (2006.01); H01L 21/033 (2006.01); H01L 21/311 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/31144 (2013.01); H01L 27/11582 (2013.01); H01L 21/32137 (2013.01); H01L 21/0337 (2013.01); H01L 29/66545 (2013.01);
Abstract

Provided are methods of fabricating a semiconductor device. The method may include forming a mold layer on a substrate, forming a mask layer on the mold layer, etching the mold layer using the mask layer as an etch mask to form a channel hole penetrating the mold layer, shrinking the mask layer to provide a reduced mask layer, forming a spacer layer to cover the reduced mask layer, and forming a vertical channel to fill the channel hole and be electrically connected to the substrate. As a result, the channel hole can have an enlarged entrance.

Find Patent Forward Citations

Lee, Jinkwan. (2014). Methods of fabricating semiconductor devices using mask shrinking (U.S. Patent No. 8883576). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8883576

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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