The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 04, 2014

Filed:

Oct. 29, 2013
Applicant:

Via Technologies, Inc., New Taipei, TW;

Inventors:

G. Glenn Henry, Austin, TX (US);

Terry Parks, Austin, TX (US);

Brent Bean, Austin, TX (US);

Thomas A. Crispin, Austin, TX (US);

Assignee:

VIA Technologies, Inc., New Taipei, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/00 (2013.01); H04L 9/08 (2006.01); G06F 12/08 (2006.01); G06F 21/52 (2013.01); G06F 21/71 (2013.01); G06F 21/72 (2013.01); G06F 9/30 (2006.01); G06F 21/60 (2013.01); H04L 9/06 (2006.01); G06F 21/54 (2013.01);
U.S. Cl.
CPC ...
H04L 9/0827 (2013.01); G06F 12/0875 (2013.01); G06F 21/52 (2013.01); G06F 21/71 (2013.01); G06F 21/72 (2013.01); G06F 9/30003 (2013.01); G06F 9/30079 (2013.01); G06F 9/30178 (2013.01); G06F 9/30189 (2013.01); H04L 9/0861 (2013.01); H04L 9/0891 (2013.01); H04L 9/0894 (2013.01); G06F 21/602 (2013.01); H04L 9/0618 (2013.01); G06F 21/54 (2013.01); G06F 2212/402 (2013.01); G06F 2212/452 (2013.01); H04L 2209/20 (2013.01); H04L 2209/12 (2013.01); G06F 2221/2107 (2013.01);
Abstract

A microprocessor is provided with a method for decrypting encrypted instruction data into plain text instruction data and securely executing the same. The microprocessor includes a master key register file comprising a plurality of master keys. Selection logic circuitry in the microprocessor selects a combination of at least two of the plurality of master keys. Key expansion circuitry in the microprocessor performs mathematical operations on the selected master keys to generate a decryption key having a long effective key length. Instruction decryption circuitry performs an efficient mathematical operation on the encrypted instruction data and the decryption key to decrypt the encrypted instruction data into plain text instruction data.


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