The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 04, 2014

Filed:

Dec. 10, 2008
Applicants:

Chandrasekhar Morisetti, Hyderabad, IN;

Susmitha V P N D Gummalla, Nuzvid, IN;

Murali Mohan Kakarla, Hyderabad, IN;

Jim Van Welzen, Raleigh, NC (US);

Inventors:

Chandrasekhar Morisetti, Hyderabad, IN;

Susmitha V P N D Gummalla, Nuzvid, IN;

Murali Mohan Kakarla, Hyderabad, IN;

Jim Van Welzen, Raleigh, NC (US);

Assignee:

Nvidia Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); H04N 19/423 (2014.01); H04N 19/436 (2014.01); H04N 19/156 (2014.01); H04N 19/127 (2014.01); H04N 19/172 (2014.01); H04N 19/44 (2014.01);
U.S. Cl.
CPC ...
H04N 19/00484 (2013.01); H04N 19/00521 (2013.01); H04N 19/00206 (2013.01); H04N 19/00103 (2013.01); H04N 19/00266 (2013.01); H04N 19/00533 (2013.01);
Abstract

Decoding a content of interest with optimal power usage. In an embodiment, a central processing unit (CPU) retrieves the frames of a data stream of interest from a secondary storage and stores them in a random access memory (RAM). The CPU forms an index table indicating the locations at which each of the frames is stored. The index table is provided to a decoder, which processes the frames in sequence to recover the original data from the encoded data. By using the index information, the power usage is reduced at least in an embodiment when the decoding is performed by an auxiliary processor.


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