The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8878612 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 04, 2014

Filed:

Jul. 17, 2013
Applicant:

Marvell World Trade Ltd., St. Michael, BB;

Inventors:

Poh Boon Leong, Singapore, SG;

Nuntha Kumar Krishnasamy Maniam, Singapore, SG;

Assignee:

Marvell World Trade Ltd., St. Michael, BB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/04 (2006.01); H03F 3/24 (2006.01); H03F 3/193 (2006.01); H03F 3/16 (2006.01); G05F 3/26 (2006.01); H03F 3/45 (2006.01);
U.S. Cl.
CPC ...
H03F 3/16 (2013.01); H03F 3/245 (2013.01); H03F 3/193 (2013.01); H03F 2203/45311 (2013.01); H03F 2203/45544 (2013.01); H03F 2203/45554 (2013.01); G05F 3/262 (2013.01); H03F 2200/555 (2013.01); H03F 2203/45294 (2013.01); H03F 2203/45304 (2013.01); H03F 3/45179 (2013.01); H03F 2203/45301 (2013.01); H03F 2203/45352 (2013.01);
Abstract

A current mirror includes a bias branch, which includes first and second transistors in series between a voltage source and ground, a voltage divider coupled between the voltage source and ground, an op-amp configured to receive a divided voltage of the voltage divider and a voltage of a node between the first and second transistors, and drive a gate of the second transistor to pull the node to the divided voltage. The current mirror further includes a power amplifier core coupled to the bias branch. The power amplifier core includes first and second drive transistors configured in series between the voltage source and ground. Gates of the first transistor and the first drive transistor are coupled, and gates of the second transistor and the second drive transistor are coupled.


Find Patent Forward Citations

Leong, Poh. (2014). Accurate bias tracking for process variation and supply modulation (U.S. Patent No. 8878612). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8878612

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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