The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 04, 2014
Filed:
Jul. 19, 2011
Hong-tsz Pan, Cupertino, CA (US);
Yun Wu, San Jose, CA (US);
Shuxian Wu, San Jose, CA (US);
Qi Lin, Cupertino, CA (US);
Bang-thu Nguyen, Santa Clara, CA (US);
Hong-Tsz Pan, Cupertino, CA (US);
Yun Wu, San Jose, CA (US);
Shuxian Wu, San Jose, CA (US);
Qi Lin, Cupertino, CA (US);
Bang-Thu Nguyen, Santa Clara, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
A method and integrated circuit structure for mitigating metal gate dishing resulting from chemical mechanical polishing. The integrated circuit structure comprises a first area comprising at least one first type device; a second area comprising at least one second type device; a third area comprising at least one capacitor having an uppermost layer of polysilicon, where the capacitor area is greater than a sum of the first and second areas. The method utilizes the polysilicon of the capacitor to mitigate metal gate dishing of a metal gate of at least one device.