The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 04, 2014
Filed:
May. 03, 2011
Applicants:
Hong-soo Kim, Yongin-si, KR;
Hwa-kyung Shin, Yongin-si, KR;
Moo-kyung Lee, Gunpo-si, KR;
Jong-ho Lim, Yongin-si, KR;
Inventors:
Hong-Soo Kim, Yongin-si, KR;
Hwa-Kyung Shin, Yongin-si, KR;
Moo-Kyung Lee, Gunpo-si, KR;
Jong-Ho Lim, Yongin-si, KR;
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/118 (2006.01); H01L 27/115 (2006.01); H01L 21/28 (2006.01); H01L 29/788 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/42324 (2013.01); H01L 27/11546 (2013.01); H01L 27/11526 (2013.01); H01L 21/28273 (2013.01); H01L 29/7881 (2013.01);
Abstract
A semiconductor device and method of manufacturing a semiconductor device include a plurality of first active regions and a second active region being formed on a substrate. The second active region is formed between two of the first active regions. A plurality of gate structures is formed on respective first active regions. A dummy gate structure is formed on the second active region, and a first voltage is applied to the dummy gate structure.