The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 04, 2014
Filed:
Mar. 30, 2009
Ashay Chitnis, Santa Barbara, CA (US);
John Edmond, Cary, NC (US);
Jeffrey Carl Britt, Cary, NC (US);
Bernd P. Keller, Santa Barbara, CA (US);
David Todd Emerson, Chapel Hill, NC (US);
Michael John Bergmann, Chapel Hill, NC (US);
Jasper S. Cabalu, Cary, NC (US);
Ashay Chitnis, Santa Barbara, CA (US);
John Edmond, Cary, NC (US);
Jeffrey Carl Britt, Cary, NC (US);
Bernd P. Keller, Santa Barbara, CA (US);
David Todd Emerson, Chapel Hill, NC (US);
Michael John Bergmann, Chapel Hill, NC (US);
Jasper S. Cabalu, Cary, NC (US);
Cree, Inc., Goleta, CA (US);
Abstract
A method for fabricating light emitting diode (LED) chips comprising providing a plurality of LEDs, typically on a wafer, and coating the LEDs with a conversion material so that at least some light from the LEDs passes through the conversion material and is converted. The light emission from the LED chips comprises light from the conversion material, typically in combination with LED light. The emission characteristics of at least some of the LED chips is measured and at least some of the conversion material over the LEDs is removed to alter the emission characteristics of the LED chips. The invention is particularly applicable to fabricating LED chips on a wafer where the LED chips have light emission characteristics that are within a range of target emission characteristics. This target range can fall within an emission region on a CIE curve to reduce the need for binning of the LEDs from the wafer. The emission characteristics of the LED chips in the wafer can be tuned to the desired range by micro-machining the conversion material over the LEDs.