The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 2014

Filed:

Jul. 02, 2013
Applicant:

Verizon Patent and Licensing Inc., Basking Ridge, NJ (US);

Inventors:

Scott R. Kotrla, Wylie, TX (US);

Matthew W. Turlington, Richardson, TX (US);

Michael U. Bencheck, Richardson, TX (US);

Tiejun J. Xia, Richardson, TX (US);

Assignee:

Verizon Patent and Licensing Inc., Basking Ridge, NJ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 10/00 (2013.01);
U.S. Cl.
CPC ...
Abstract

A bit error generating device includes a light source, an input device, and a control processor. The control processor includes logic configured to: receive protocol or bitrate information regarding a live traffic signal via the input device; determine bit error simulation signal parameters based on the received protocol or bitrate information; configure the light source to generate the bit error simulation signal based on the bit error simulation signal parameters; and instruct the light source to inject the bit error simulation signal into an optical fiber carrying the live traffic signal.


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