The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 2014

Filed:

Apr. 29, 2013
Applicant:

Industrial Technology Research Institute, Hsinchu, TW;

Inventors:

Wen-Pin Lin, Kaohsiung, TW;

Chih-He Lin, Yunlin County, TW;

Shyh-Shyuan Sheu, Taipei, TW;

Hsin-Chi Lai, Taichung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/173 (2006.01); G06F 7/38 (2006.01); H03K 19/177 (2006.01);
U.S. Cl.
CPC ...
H03K 19/1776 (2013.01);
Abstract

A configurable logic block (CLB) and an operation method of the CLB are provided. The CLB includes memory units and a selecting circuit. The memory unit includes a first resistive non-volatile memory (RNVM) element and a second RNVM element. Top electrodes (TEs) of the first and second RNVM elements are coupled to an output terminal of the memory unit. Bottom electrodes (BEs) of the first and second RNVM elements are respectively coupled to a first bias terminal and a second bias terminal of the memory unit. The selecting circuit selects one of the memory units according to an input logic value and determines an output logic value of the CLB according to an output logic value of the selected memory unit.


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